Problems associated with the preparation of high-quality and contamination-free graphene on semiconductor that does not heavily interact with its underlying substrate has so far hindered the large-scale integration of graphene in device structures. We will present our recent work on growing graphene on silicon carbide (SiC) by means of various transition metal catalysts, with subsequent intercalation of silicon and oxygen under the graphene layers to form an electrically insulating dielectric layer, and removal of the transition metal catalyst [1]. The interaction of thin metal films with thermally treated SiC mediates liberation of carbon, allowing the formation graphene on semiconductor at temperatures down to 600⁰C [2]. The liberation of carbon only where metal contacts the SiC substrate is used to selectively grow graphene in patterned regions only: device geometries can easily be defined by simple and scalable shadow-masking methods, rather than complex lithography. The metal silicide layers that form can be removed by furthering the annealing process. Subsequent intercalation of silicon and oxygen results in the decoupling of the graphene from its substrate by forming an insulating silicon oxide layer [3]. The result is crystalline top layers of quasi-free-standing graphene, where the thickness of the interfacial dielectric layer can be tuned by controlling the intercalation of silicon prior to the oxidation step.

[1] H. I. Røst et al. “Low Temperature Growth of Graphene on Semiconductor”, in preparation.

[2] S. Cooil et al. Carbon 50:5099–5105 (2012).

[3] S. Lizzit et al. "Transfer-free electrical insulation of epitaxial graphene from its metal substrate." Nano letters 12.9 (2012): 4503-4507.