As graphene is up-scaled to wafer-sized production, it is important to have a robust, fast and accurate method for routine characterization of the electrical properties on large scale. Here we consider a fabrication procedure involving wafer-scale laser fabrication of graphene devices to serve this purpose. The inherent advantages of this method include the high speed of device fabrication and the prevention of degradation of the electrical properties associated with traditional lithographic methods:  i.e. avoiding contact to polymers/liquids, known to adversely affect the electrical properties [1].

Commercially purchased CVD graphene (covering a 4-inch Si wafer on SiO₂) has metal electrodes (Ti/Au) deposited using electron-beam evaporation through a stencil shadow mask. The graphene is then patterned via ablation (see Figure 1) with a pulsed laser to define large devices (Hall bars or van der Pauw geometries), enabling the large-scale electrical properties to be tested.