posted 15 Feb 2021, 11:50 by Peter Boggild
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updated 15 Feb 2021, 12:06
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IMEC KU Leuven. Leuven Heverlee, Flanders, BelgiumThe development of silicon semiconductor technology has produced breakthroughs in electronics—from the microprocessor in the late 1960s to early 1970s, to automation, computers, and smartphones—by downscaling the physical size of devices and wires to the nanometre regime. Now, graphene and related two-dimensional (2D) materials offer prospects of unprecedented advances in device performance at the atomic limit, and a synergistic combination of 2D materials with silicon chips promises a heterogeneous platform to deliver massively enhanced potential based on silicon technology. Nevertheless, large area co-integration with Si platforms is challenging and progressing at a slow pace suffering from limited reproducibility and a gap between results achieved on encapsulated flakes and synthetic materials.
It is generally accepted that this is mainly due to a lack of the required infrastructure which allows controlling the interfaces of the 2D materials at large scale. In this presentation, we will discuss the processing challenges that we need to research to mature the integration and access the semiconductor standards. Different wafer-level 2D-material growth methods are discussed and benchmarked. A fully automated transfer method will be discussed and remaining challenges are addressed. Finally, we established an integration module for 2D materials in the 300 mm line. We demonstrate the integration of graphene and MX2-based transistors using standard state of the art production tools.We will demonstrate integrated devices where 2D material was directly deposited or growth on a template surface and transferred to the pre-processed target wafer. The major integration challenges are the limited adhesion and the fragility of the (few)monolayer 2D material. We end up with an outlook of the remaining challenges to make 2D materials integration complete part of the Si processing portfolio in order to have 2D materials popping up in products that are put on the market in the field of microprocessors, memories, telecommunication, internet of things, sensor, healthcare and bio-applications.  Cedric Huyghebaert is currently program manager of exploratory processes and modules at Imec, dealing with material exploration and early module integration for functional applications. He is the primary investigator for Imec in the Graphene Flagship and deputy of the wafer-scale integration work package. He started as a junior researcher in the materials and component analysis group at Imec. He studied the oxygen beam interactions during sputtering profiling of semiconductors. He received his PhD in Physics in 2006 at the KULeuven in Belgium. In 2005 he joined Imecs pilot line as a support integration engineer, especially dealing with the process contamination control. He was part of the packaging group from end 2007 till begin 2010, working as a senior integration engineer dealing with 3D-stacked IC integration. From 2010 to 2019 he led the nano-applications and –material engineering (NAME) group at Imec. He (co-)authored more than 150 journal and conference papers and holds >40 Patents.
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